A simple guide to CPUs, GPUs, TPUs, NPUs, FPGAs, and ASICs
In this series (35 parts)
- Why GPUs and CUDA? A beginner's starting point
- A simple guide to CPUs, GPUs, TPUs, NPUs, FPGAs, and ASICs
- GPUs: from pixels to parallel supercomputers
- Your first CUDA program: kernels, threads, and grids
- Python GPU programming: CuPy vs Numba vs PyCUDA
- Thread hierarchy in CUDA: threads, blocks, warps, and grids
- Inside a modern NVIDIA GPU: SMs, schedulers, CUDA cores, and tensor cores
- Warp divergence in CUDA: detection and optimization
- Floating-point performance on GPUs: precision, FLOPs, and numerical error
- CUDA memory hierarchy: where your data lives matters
- Memory coalescing: the most important optimization you will learn
- Shared memory and tiling: the key to fast matrix operations
- Debugging and profiling CUDA programs
- Device functions, host functions, and CUDA function qualifiers
- Building reusable CUDA libraries with CMake and Python bindings
- CUDA synchronization and atomics: __syncthreads, atomicAdd, and barriers
- Parallel prefix sum and reduction: the core parallel primitives
- Concurrent data structures on the GPU
- CUDA streams and asynchronous execution
- cudaEventSynchronize and CUDA events: accurate kernel timing
- Dynamic parallelism: kernels launching kernels
- Unified virtual memory: one pointer for CPU and GPU
- Multi GPU CUDA: NCCL, NVLink, and peer access
- Memory allocation patterns and multi-dimensional arrays in CUDA
- Texture and constant memory: specialized caches
- CUDA occupancy and register pressure: performance tuning guide
- Case study: matrix multiplication from naive to cuBLAS speed
- Case study: implementing a convolution layer in CUDA
- Case study: reduction and histogram at scale
- Heterogeneous computing: CPU and GPU working together
- Advanced memory patterns: pinned memory, zero-copy, and more
- Advanced stream patterns and concurrent kernel execution
- Performance case studies and optimization patterns
- CUDA Sobel edge detection: from naive kernel to profiled pipeline
- Where to go from here: CUDA ecosystem and next steps
Optional reading
You do not need this article to continue learning CUDA. It is a short map of the names you may see when people discuss AI and high-performance computing.
If your goal is to start programming a GPU, you can skip to GPUs: from pixels to parallel supercomputers.
Why there are different processors
No processor is best at every job.
A flexible processor can run many kinds of programs. A specialized processor supports fewer kinds of work, but it can perform its intended job using less time or power. Hardware designers choose a different balance for each device.
flowchart LR CPU["CPU<br/>most flexible"] --> GPU["GPU<br/>parallel calculations"] GPU --> TPU["TPU<br/>large AI calculations"] GPU --> NPU["NPU<br/>low-power AI"] GPU --> FPGA["FPGA<br/>reconfigurable hardware"] TPU --> ASIC["Custom ASIC<br/>one specialized job"] NPU --> ASIC FPGA --> ASIC style CPU fill:#4a90d9,color:#fff style GPU fill:#e8744f,color:#fff style ASIC fill:#9b59b6,color:#fff
The diagram is a rough guide, not a strict ranking. These devices overlap, and many computers contain more than one of them.
The six names in plain language
CPU: the general-purpose processor
A CPU runs the operating system and handles many different kinds of work. It is good at complex logic, frequent decisions, and tasks that must happen in a particular order.
Example: running a web browser, reading a file, or handling a network request.
GPU: the parallel worker
A GPU performs large numbers of similar calculations at the same time. It is programmable enough to support graphics, simulations, scientific computing, and machine learning.
Example: processing an image or multiplying large matrices.
This combination of parallel speed and programmability is why the rest of this series focuses on GPUs.
TPU: a processor for AI calculations
TPU commonly refers to Google’s processors designed around the matrix calculations used by machine-learning models. They work through Google’s software and cloud ecosystem.
Example: training or serving a large model using Google Cloud.
NPU: low-power AI on a device
An NPU is designed to run trained AI models efficiently on phones, laptops, cameras, and other power-limited devices. Different vendors use the name for different hardware.
Example: removing background noise during a video call without sending audio to the cloud.
FPGA: hardware you can reconfigure
An FPGA contains logic that can be rewired after the chip is manufactured. Engineers use special hardware-design tools to create a custom processing pipeline.
Example: processing network packets with predictable, very low delay.
ASIC: a chip made for one purpose
An ASIC is a chip designed for a specific job. It can be extremely efficient, but designing and manufacturing one is expensive and the hardware cannot be repurposed easily.
Example: a chip built only to encode video or perform a fixed cryptographic calculation.
A compact comparison
| Processor | Best simple description | Common use |
|---|---|---|
| CPU | Flexible and good at decisions | Operating systems and application logic |
| GPU | Many similar calculations in parallel | Graphics, science, and model training |
| TPU | Specialized large-scale AI math | AI workloads in Google’s ecosystem |
| NPU | Low-power AI inference | Phones, laptops, and embedded devices |
| FPGA | Hardware logic that can be changed | Networking and custom low-latency pipelines |
| ASIC | Hardware built for one stable job | High-volume specialized products |
A practical way to choose
Start with the simplest hardware that meets the need:
- Use a CPU for ordinary application logic or small, irregular workloads.
- Use a GPU when a large calculation has many similar, independent pieces.
- Consider a TPU when the workload and software already fit that cloud ecosystem.
- Use an NPU for supported AI models on a battery-powered device.
- Consider an FPGA when you need a custom hardware pipeline and have hardware-design expertise.
- Consider a custom ASIC only when a stable, high-volume product can justify creating a chip.
Most software developers will work directly with CPUs and GPUs. NPUs are often accessed through a device framework, TPUs through a cloud framework, and FPGAs or ASICs through specialized hardware teams.
Why learn CUDA
Among these choices, a GPU offers a useful middle ground: it is highly parallel but still programmable for many kinds of numeric work. CUDA provides the tools needed to control that GPU directly.
You do not need to memorize the full accelerator landscape. Remember one idea: different processors are built for different shapes of work. This series teaches you how to recognize and program work that fits an NVIDIA GPU.
What comes next
Continue with GPUs: from pixels to parallel supercomputers to see how GPUs became programmable and why CUDA was created.